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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/hpca/PenryFHWSAC06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dan_Connors>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Daniel_Fay>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_A._Penry>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_Hodgdon>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_I._August>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Graham_Schelle>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ryan_Wells>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FHPCA.2006.1598110>
foaf:homepage <https://doi.org/10.1109/HPCA.2006.1598110>
dc:identifier DBLP conf/hpca/PenryFHWSAC06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FHPCA.2006.1598110 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Exploiting parallelism and structure to accelerate the simulation of chip multi-processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dan_Connors>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Daniel_Fay>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_A._Penry>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_Hodgdon>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_I._August>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Graham_Schelle>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ryan_Wells>
swrc:pages 29-40 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/hpca/2006>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/hpca/hpca2006.html#PenryFHWSAC06>
rdfs:seeAlso <https://doi.org/10.1109/HPCA.2006.1598110>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/hpca>
dc:title Exploiting parallelism and structure to accelerate the simulation of chip multi-processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document