Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/hpca/TaylorLAA03
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/hpca/TaylorLAA03
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Anant_Agarwal
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Michael_Bedford_Taylor
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Saman_P._Amarasinghe
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Walter_Lee
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FHPCA.2003.1183551
>
foaf:
homepage
<
https://doi.org/10.1109/HPCA.2003.1183551
>
dc:
identifier
DBLP conf/hpca/TaylorLAA03
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FHPCA.2003.1183551
(xsd:string)
dcterms:
issued
2003
(xsd:gYear)
rdfs:
label
Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Anant_Agarwal
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Michael_Bedford_Taylor
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Saman_P._Amarasinghe
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Walter_Lee
>
swrc:
pages
341-353
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/hpca/2003
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/hpca/TaylorLAA03/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/hpca/TaylorLAA03
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/hpca/hpca2003.html#TaylorLAA03
>
rdfs:
seeAlso
<
https://doi.org/10.1109/HPCA.2003.1183551
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/hpca
>
dc:
title
Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document