[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/hpca/XiaT96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chun_Xia>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Josep_Torrellas>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FHPCA.1996.501176>
foaf:homepage <https://doi.org/10.1109/HPCA.1996.501176>
dc:identifier DBLP conf/hpca/XiaT96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FHPCA.1996.501176 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Improving the Data Cache Performance of Multiprocessor Operating Systems. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chun_Xia>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Josep_Torrellas>
swrc:pages 85-94 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/hpca/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/hpca/XiaT96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/hpca/XiaT96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/hpca/hpca1996.html#XiaT96>
rdfs:seeAlso <https://doi.org/10.1109/HPCA.1996.501176>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/hpca>
dc:subject data cache performance, operating system effect on caches, bus-based multiprocessor, address trace evaluation, block operations, latency hiding (xsd:string)
dc:title Improving the Data Cache Performance of Multiprocessor Operating Systems. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document