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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/hpca/ZhangZSCCG24>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chen_Chen_0067>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guan_Shen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jieru_Zhao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Minyi_Guo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Quan_Chen_0002>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Weichuang_Zhang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FHPCA57654.2024.00017>
foaf:homepage <https://doi.org/10.1109/HPCA57654.2024.00017>
dc:identifier DBLP conf/hpca/ZhangZSCCG24 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FHPCA57654.2024.00017 (xsd:string)
dcterms:issued 2024 (xsd:gYear)
rdfs:label An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator Generation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chen_Chen_0067>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guan_Shen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jieru_Zhao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Minyi_Guo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Quan_Chen_0002>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Weichuang_Zhang>
swrc:pages 75-90 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/hpca/2024>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/hpca/ZhangZSCCG24/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/hpca/ZhangZSCCG24>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/hpca/hpca2024.html#ZhangZSCCG24>
rdfs:seeAlso <https://doi.org/10.1109/HPCA57654.2024.00017>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/hpca>
dc:title An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator Generation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document