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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/hpcc/HeXVLS09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Athanasios_V._Vasilakos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guoliang_He>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naixue_Xiong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuanxiang_Li>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhongzhi_Shi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FHPCC.2009.80>
foaf:homepage <https://doi.org/10.1109/HPCC.2009.80>
dc:identifier DBLP conf/hpcc/HeXVLS09 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FHPCC.2009.80 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Automated Design of Logic Circuits with a Increasable Evolution Approach. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Athanasios_V._Vasilakos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guoliang_He>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naixue_Xiong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuanxiang_Li>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhongzhi_Shi>
swrc:pages 206-213 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/hpcc/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/hpcc/HeXVLS09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/hpcc/HeXVLS09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/hpcc/hpcc2009.html#HeXVLS09>
rdfs:seeAlso <https://doi.org/10.1109/HPCC.2009.80>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/hpcc>
dc:title Automated Design of Logic Circuits with a Increasable Evolution Approach. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document