Design and Implementation of a Prioritized Packet-Processing Module on NetFPGA Platform.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/hpcc/TsaiCCLY13
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Design and Implementation of a Prioritized Packet-Processing Module on NetFPGA Platform.
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Design and Implementation of a Prioritized Packet-Processing Module on NetFPGA Platform.
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