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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/hpec/JainKTG21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Aashish_Tripathi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Abhishek_Kumar_Jain>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dinesh_Gaitonde>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sharan_Kumar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FHPEC49654.2021.9622804>
foaf:homepage <https://doi.org/10.1109/HPEC49654.2021.9622804>
dc:identifier DBLP conf/hpec/JainKTG21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FHPEC49654.2021.9622804 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label Sparse Deep Neural Network Acceleration on HBM-Enabled FPGA Platform. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Aashish_Tripathi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Abhishek_Kumar_Jain>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dinesh_Gaitonde>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sharan_Kumar>
swrc:pages 1-7 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/hpec/2021>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/hpec/JainKTG21/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/hpec/JainKTG21>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/hpec/hpec2021.html#JainKTG21>
rdfs:seeAlso <https://doi.org/10.1109/HPEC49654.2021.9622804>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/hpec>
dc:title Sparse Deep Neural Network Acceleration on HBM-Enabled FPGA Platform. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document