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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/hpec/SchwallerRG17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alan_D._George>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Barath_Ramesh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Benjamin_Schwaller>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FHPEC.2017.8091094>
foaf:homepage <https://doi.org/10.1109/HPEC.2017.8091094>
dc:identifier DBLP conf/hpec/SchwallerRG17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FHPEC.2017.8091094 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label Investigating TI KeyStone II and quad-core ARM Cortex-A53 architectures for on-board space processing. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alan_D._George>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Barath_Ramesh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Benjamin_Schwaller>
swrc:pages 1-7 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/hpec/2017>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/hpec/SchwallerRG17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/hpec/SchwallerRG17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/hpec/hpec2017.html#SchwallerRG17>
rdfs:seeAlso <https://doi.org/10.1109/HPEC.2017.8091094>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/hpec>
dc:title Investigating TI KeyStone II and quad-core ARM Cortex-A53 architectures for on-board space processing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document