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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Krishnendu_Dhar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICACCI.2014.6968212>
foaf:homepage <https://doi.org/10.1109/ICACCI.2014.6968212>
dc:identifier DBLP conf/icacci/Dhar14 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICACCI.2014.6968212 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
rdfs:label Design of a high speed, low power synchronously clocked NOR-based JK flip-flop using modified GDI technique in 45nm technology. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Krishnendu_Dhar>
swrc:pages 600-606 (xsd:string)
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icacci/icacci2014.html#Dhar14>
rdfs:seeAlso <https://doi.org/10.1109/ICACCI.2014.6968212>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icacci>
dc:title Design of a high speed, low power synchronously clocked NOR-based JK flip-flop using modified GDI technique in 45nm technology. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document