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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icann/NedjahSMS08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luiza_de_Macedo_Mourelle>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marcus_Vin%E2%88%9A%E2%89%A0cius_Carvalho_da_Silva>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nadia_Nedjah>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rodrigo_Martins_da_Silva>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-87559-8%5F18>
foaf:homepage <https://doi.org/10.1007/978-3-540-87559-8_18>
dc:identifier DBLP conf/icann/NedjahSMS08 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-87559-8%5F18 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Reconfigurable MAC-Based Architecture for Parallel Hardware Implementation on FPGAs of Artificial Neural Networks. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luiza_de_Macedo_Mourelle>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marcus_Vin%E2%88%9A%E2%89%A0cius_Carvalho_da_Silva>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nadia_Nedjah>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rodrigo_Martins_da_Silva>
swrc:pages 169-178 (xsd:string)
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swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icann>
dc:title Reconfigurable MAC-Based Architecture for Parallel Hardware Implementation on FPGAs of Artificial Neural Networks. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document