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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icassp/CappelloLS83>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrea_S._LaPaugh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kenneth_Steiglitz>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peter_R._Cappello>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICASSP.1983.1172150>
foaf:homepage <https://doi.org/10.1109/ICASSP.1983.1172150>
dc:identifier DBLP conf/icassp/CappelloLS83 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICASSP.1983.1172150 (xsd:string)
dcterms:issued 1983 (xsd:gYear)
rdfs:label Optimal choice of intermediate latching to maximize throughput in VLSI circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrea_S._LaPaugh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kenneth_Steiglitz>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peter_R._Cappello>
swrc:pages 935-938 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icassp/1983>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icassp/CappelloLS83/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icassp/CappelloLS83>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icassp/icassp1983.html#CappelloLS83>
rdfs:seeAlso <https://doi.org/10.1109/ICASSP.1983.1172150>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icassp>
dc:title Optimal choice of intermediate latching to maximize throughput in VLSI circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document