Designing efficient residue arithmetic based VLSI correlators. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Christopher_T._Clarke>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Manish_Bhardwaj>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Thambipillai_Srikanthan>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FICASSP.1998.678162>
foaf:homepage	<https://doi.org/10.1109/ICASSP.1998.678162>
dc:identifier	DBLP conf/icassp/DeodharBCS98 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FICASSP.1998.678162 (xsd:string)
dcterms:issued	1998 (xsd:gYear)
rdfs:label	Designing efficient residue arithmetic based VLSI correlators. (xsd:string)
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foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Manish_Bhardwaj>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Thambipillai_Srikanthan>
swrc:pages	3021-3024 (xsd:string)
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dc:title	Designing efficient residue arithmetic based VLSI correlators. (xsd:string)
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