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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icbea/FreitasDMX18>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Adi_Xhakoni>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fernando_Morgado_Dias>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guy_Meynants>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luis_Miguel_Carvalho_Freitas>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICBEA.2018.8471744>
foaf:homepage <https://doi.org/10.1109/ICBEA.2018.8471744>
dc:identifier DBLP conf/icbea/FreitasDMX18 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICBEA.2018.8471744 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
rdfs:label Design and Simulation of a CMOS Slew-Rate Enhanced OTA to Drive Heavy Capacitive Loads. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Adi_Xhakoni>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fernando_Morgado_Dias>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guy_Meynants>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luis_Miguel_Carvalho_Freitas>
swrc:pages 1-6 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icbea/2018>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icbea/FreitasDMX18/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icbea/FreitasDMX18>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icbea/icbea2018.html#FreitasDMX18>
rdfs:seeAlso <https://doi.org/10.1109/ICBEA.2018.8471744>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icbea>
dc:title Design and Simulation of a CMOS Slew-Rate Enhanced OTA to Drive Heavy Capacitive Loads. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document