Numerical Simulation of Static Noise Margin for a Six-Transistor Static Random Access Memory Cell with 32nm Fin-Typed Field Effect Transistors. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/iccS/LiHY07>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Chih-Hong_Hwang>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Shao-Ming_Yu>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Yiming_Li_0005>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-72590-9%5F33>
foaf:homepage	<https://doi.org/10.1007/978-3-540-72590-9_33>
dc:identifier	DBLP conf/iccS/LiHY07 (xsd:string)
dc:identifier	DOI doi.org%2F10.1007%2F978-3-540-72590-9%5F33 (xsd:string)
dcterms:issued	2007 (xsd:gYear)
rdfs:label	Numerical Simulation of Static Noise Margin for a Six-Transistor Static Random Access Memory Cell with 32nm Fin-Typed Field Effect Transistors. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Chih-Hong_Hwang>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Shao-Ming_Yu>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Yiming_Li_0005>
swrc:pages	227-234 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/iccS/2007-4>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/iccS/LiHY07/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/iccS/LiHY07>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/iccS/iccS2007-4.html#LiHY07>
rdfs:seeAlso	<https://doi.org/10.1007/978-3-540-72590-9_33>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/iccS>
dc:subject	FinFET; SRAM; modeling and simulation; computational statistics (xsd:string)
dc:title	Numerical Simulation of Static Noise Margin for a Six-Transistor Static Random Access Memory Cell with 32nm Fin-Typed Field Effect Transistors. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:InProceedings
rdf:type	foaf:Document