Inaccuracies in power estimation during logic synthesis. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/iccad/BrandV96>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Chandramouli_Visweswariah>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Daniel_Brand>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FICCAD.1996.569826>
foaf:homepage	<https://doi.org/10.1109/ICCAD.1996.569826>
dc:identifier	DBLP conf/iccad/BrandV96 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FICCAD.1996.569826 (xsd:string)
dcterms:issued	1996 (xsd:gYear)
rdfs:label	Inaccuracies in power estimation during logic synthesis. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Chandramouli_Visweswariah>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Daniel_Brand>
swrc:pages	388-394 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/iccad/1996>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/iccad/BrandV96/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/iccad/BrandV96>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/iccad/iccad1996.html#BrandV96>
rdfs:seeAlso	<https://doi.org/10.1109/ICCAD.1996.569826>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/iccad>
dc:subject	power estimation, power optimization, glitch power, logic synthesis, simulation (xsd:string)
dc:title	Inaccuracies in power estimation during logic synthesis. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:InProceedings
rdf:type	foaf:Document