Hidden-ROM: A Compute-in-ROM Architecture to Deploy Large-Scale Neural Networks on Chip with Flexible and Scalable Post-Fabrication Task Transfer Capability. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Guodong_Yin>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Huazhong_Yang>
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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Xueqing_Li>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Yiming_Chen>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Yongpan_Liu>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Zekun_Yang>
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dc:identifier	DBLP conf/iccad/ChenYLTYLYL22 (xsd:string)
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dcterms:issued	2022 (xsd:gYear)
rdfs:label	Hidden-ROM: A Compute-in-ROM Architecture to Deploy Large-Scale Neural Networks on Chip with Flexible and Scalable Post-Fabrication Task Transfer Capability. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Guodong_Yin>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Huazhong_Yang>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Mingyen_Lee>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Wenjun_Tang>
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foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Yongpan_Liu>
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dc:title	Hidden-ROM: A Compute-in-ROM Architecture to Deploy Large-Scale Neural Networks on Chip with Flexible and Scalable Post-Fabrication Task Transfer Capability. (xsd:string)
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