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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccad/ChiuSMB06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Deshanand_P._Singh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gordon_R._Chiu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stephen_Dean_Brown>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Valavan_Manohararajah>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1233501.1233530>
foaf:homepage <https://doi.org/10.1145/1233501.1233530>
dc:identifier DBLP conf/iccad/ChiuSMB06 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1233501.1233530 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Mapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Deshanand_P._Singh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gordon_R._Chiu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stephen_Dean_Brown>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Valavan_Manohararajah>
swrc:pages 135-142 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccad/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccad/ChiuSMB06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccad/ChiuSMB06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccad/iccad2006.html#ChiuSMB06>
rdfs:seeAlso <https://doi.org/10.1145/1233501.1233530>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccad>
dc:title Mapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document