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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccad/HsiaoRP97>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Elizabeth_M._Rudnick>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Janak_H._Patel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michael_S._Hsiao>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCAD.1997.643360>
foaf:homepage <https://doi.org/10.1109/ICCAD.1997.643360>
dc:identifier DBLP conf/iccad/HsiaoRP97 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCAD.1997.643360 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
rdfs:label Effects of delay models on peak power estimation of VLSI sequential circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Elizabeth_M._Rudnick>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Janak_H._Patel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michael_S._Hsiao>
swrc:pages 45-51 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccad/1997>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccad/HsiaoRP97/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccad/HsiaoRP97>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccad/iccad1997.html#HsiaoRP97>
rdfs:seeAlso <https://doi.org/10.1109/ICCAD.1997.643360>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccad>
dc:subject peak power, variable delay, sustainable power, n-cycle power, genetic optimization (xsd:string)
dc:title Effects of delay models on peak power estimation of VLSI sequential circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document