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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccad/LillisCL95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chung-Kuan_Cheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/John_Lillis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ting-Ting_Y._Lin>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCAD.1995.480004>
foaf:homepage <https://doi.org/10.1109/ICCAD.1995.480004>
dc:identifier DBLP conf/iccad/LillisCL95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCAD.1995.480004 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Optimal wire sizing and buffer insertion for low power and a generalized delay model. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chung-Kuan_Cheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/John_Lillis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ting-Ting_Y._Lin>
swrc:pages 138-143 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccad/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccad/LillisCL95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccad/LillisCL95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccad/iccad1995.html#LillisCL95>
rdfs:seeAlso <https://doi.org/10.1109/ICCAD.1995.480004>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccad>
dc:subject Timing Optization, Elmore Delay, Dynamic Power Dissipation, Dynamic Programming, Signal Slew (xsd:string)
dc:title Optimal wire sizing and buffer insertion for low power and a generalized delay model. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document