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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccad/NagR95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rob_A._Rutenbar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sudip_K._Nag>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCAD.1995.480137>
foaf:homepage <https://doi.org/10.1109/ICCAD.1995.480137>
dc:identifier DBLP conf/iccad/NagR95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCAD.1995.480137 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Performance-driven simultaneous place and route for island-style FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rob_A._Rutenbar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sudip_K._Nag>
swrc:pages 332-338 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccad/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccad/NagR95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccad/NagR95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccad/iccad1995.html#NagR95>
rdfs:seeAlso <https://doi.org/10.1109/ICCAD.1995.480137>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccad>
dc:subject FPGAs, Xilinx 4000-series FPGAs, circuit layout, circuit layout CAD, field programmable gate arrays, industrial designs, island-style FPGAs, logic CAD, network routing, performance-driven simultaneous placement/routing, place and route tools (xsd:string)
dc:title Performance-driven simultaneous place and route for island-style FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document