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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccad/NovakovskySH02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sasha_Novakovsky>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shy_Shyman>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ziyad_Hanna>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F774572.774649>
foaf:homepage <https://doi.org/10.1145/774572.774649>
dc:identifier DBLP conf/iccad/NovakovskySH02 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F774572.774649 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label High capacity and automatic functional extraction tool for industrial VLSI circuit designs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sasha_Novakovsky>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shy_Shyman>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ziyad_Hanna>
swrc:pages 520-525 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccad/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccad/NovakovskySH02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccad/NovakovskySH02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccad/iccad2002.html#NovakovskySH02>
rdfs:seeAlso <https://doi.org/10.1145/774572.774649>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccad>
dc:subject Binary Decision Diagrams (BDDs), Design For Testability (DFT), Formal Equivalence Verification (FEV), Hardware Description Languages (HDL), Switch Level Analysis, functional abstraction, logic simulation, satisfiability procedures, synthesis (xsd:string)
dc:title High capacity and automatic functional extraction tool for industrial VLSI circuit designs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document