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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccad/PuriBR96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrew_Bjorksten>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ruchir_Puri>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thomas_E._Rosser>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCAD.1996.568901>
foaf:homepage <https://doi.org/10.1109/ICCAD.1996.568901>
dc:identifier DBLP conf/iccad/PuriBR96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCAD.1996.568901 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Logic optimization by output phase assignment in dynamic logic synthesis. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrew_Bjorksten>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ruchir_Puri>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thomas_E._Rosser>
swrc:pages 2-7 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccad/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccad/PuriBR96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccad/PuriBR96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccad/iccad1996.html#PuriBR96>
rdfs:seeAlso <https://doi.org/10.1109/ICCAD.1996.568901>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccad>
dc:subject area overhead, domino logic, dynamic logic synthesis, heuristic algorithms, inverters, logic design, logic duplication, logic functions, logic optimization, minimum logic duplication penalty, optimal algorithms, output phase assignment (xsd:string)
dc:title Logic optimization by output phase assignment in dynamic logic synthesis. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document