A code refinement methodology for performance-improved synthesis from C.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/iccad/StittVN06
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2006
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A code refinement methodology for performance-improved synthesis from C.
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FPGA, code refinement, coding guidelines, compilation, embedded systems, hardware/software partitioning, synthesis
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A code refinement methodology for performance-improved synthesis from C.
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