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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccchina/WangLZ14>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Huisheng_Zhang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lixin_Li>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wenjing_Wang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCChina.2014.7008293>
foaf:homepage <https://doi.org/10.1109/ICCChina.2014.7008293>
dc:identifier DBLP conf/iccchina/WangLZ14 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCChina.2014.7008293 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
rdfs:label Simplified partially parallel DVB-S2 LDPC decoder architectural design based on FPGA. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Huisheng_Zhang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lixin_Li>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wenjing_Wang>
swrc:pages 314-318 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccchina/2014>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccchina/WangLZ14/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccchina/WangLZ14>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccchina/iccchina2014.html#WangLZ14>
rdfs:seeAlso <https://doi.org/10.1109/ICCChina.2014.7008293>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccchina>
dc:title Simplified partially parallel DVB-S2 LDPC decoder architectural design based on FPGA. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document