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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccd/DuttaWW95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrew_Wolfe>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Santanu_Dutta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wayne_H._Wolf>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCD.1995.528914>
foaf:homepage <https://doi.org/10.1109/ICCD.1995.528914>
dc:identifier DBLP conf/iccd/DuttaWW95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCD.1995.528914 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label VLSI issues in memory-system design for video signal processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrew_Wolfe>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Santanu_Dutta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wayne_H._Wolf>
swrc:pages 498-503 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccd/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccd/DuttaWW95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccd/DuttaWW95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccd/iccd1995.html#DuttaWW95>
rdfs:seeAlso <https://doi.org/10.1109/ICCD.1995.528914>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccd>
dc:subject memory architecture; VLSI; video signal processing; VLSI issues; memory-system design; video signal processors; memory-system architectures; area; cycle time; utilization; circuit-level issues; system architecture; memory architecture; register-cache based hierarchy; general-purpose programmable microprocessors (xsd:string)
dc:title VLSI issues in memory-system design for video signal processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document