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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccd/Greenstreet95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mark_R._Greenstreet>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCD.1995.528788>
foaf:homepage <https://doi.org/10.1109/ICCD.1995.528788>
dc:identifier DBLP conf/iccd/Greenstreet95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCD.1995.528788 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Implementing a STARI chip. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mark_R._Greenstreet>
swrc:pages 38-43 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccd/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccd/Greenstreet95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccd/Greenstreet95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccd/iccd1995.html#Greenstreet95>
rdfs:seeAlso <https://doi.org/10.1109/ICCD.1995.528788>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccd>
dc:subject digital signal processing chips; CMOS digital integrated circuits; timing circuits; STARI chip; high-speed signaling technique; self-timed circuits; synchronous circuits; MOSIS 2/spl mu/ CMOS process; self-timed FIFO; robust compensation; clock skew; 2 micron (xsd:string)
dc:title Implementing a STARI chip. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document