A dynamic cache sub-block design to reduce false sharing.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/iccd/KadiyalaB95
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1995
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A dynamic cache sub-block design to reduce false sharing.
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cache storage; memory protocols; memory architecture; dynamic cache sub-block design; false sharing; bus traffic; dynamic sub-block coherence protocol; simulation results
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A dynamic cache sub-block design to reduce false sharing.
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