High level profiling based low power synthesis technique.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/iccd/KatkooriKV95
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1995
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High level profiling based low power synthesis technique.
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logic design; VLSI; high level profiling based low power synthesis technique; power estimation; average switching capacitance; user-specified set; area; delay; switching capacitance
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High level profiling based low power synthesis technique.
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