A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/iccd/KhellahGTYKBNI05
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A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors.
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A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors.
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