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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccd/KudohTUKYI95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Junya_Kudoh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masaharu_Kimura>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shigeru_Yamamoto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Toshiro_Takahashi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Youichi_Ito>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yukio_Umada>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCD.1995.528786>
foaf:homepage <https://doi.org/10.1109/ICCD.1995.528786>
dc:identifier DBLP conf/iccd/KudohTUKYI95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCD.1995.528786 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label A CMOS gate array with dynamic-termination GTL I/O circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Junya_Kudoh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masaharu_Kimura>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shigeru_Yamamoto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Toshiro_Takahashi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Youichi_Ito>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yukio_Umada>
swrc:pages 25-29 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccd/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccd/KudohTUKYI95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccd/KudohTUKYI95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccd/iccd1995.html#KudohTUKYI95>
rdfs:seeAlso <https://doi.org/10.1109/ICCD.1995.528786>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccd>
dc:subject logic arrays; CMOS logic circuits; logic testing; delays; CMOS gate array; dynamic-termination GTL I/O circuits; triple-metal-layer process technology; push-pull output driver; dynamic termination receiver; 250 Mb/s data; stub line; terminated bus line; IDDQ testability; differential receiver; delay time overheads; 0.5 micron; 250 Mbit/s (xsd:string)
dc:title A CMOS gate array with dynamic-termination GTL I/O circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document