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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccd/RuanNHL02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chia-Lin_Ho>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Edwin_Naroska>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Feipei_Lai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shanq-Jang_Ruan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCD.2002.1106790>
foaf:homepage <https://doi.org/10.1109/ICCD.2002.1106790>
dc:identifier DBLP conf/iccd/RuanNHL02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCD.2002.1106790 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chia-Lin_Ho>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Edwin_Naroska>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Feipei_Lai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shanq-Jang_Ruan>
swrc:pages 327- (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccd/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccd/RuanNHL02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccd/RuanNHL02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccd/iccd2002.html#RuanNHL02>
rdfs:seeAlso <https://doi.org/10.1109/ICCD.2002.1106790>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccd>
dc:title Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document