[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccd/ShyuCWC99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guang-Ming_Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michael_Shyu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yao-Wen_Chang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yu-Dong_Chang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCD.1999.808557>
foaf:homepage <https://doi.org/10.1109/ICCD.1999.808557>
dc:identifier DBLP conf/iccd/ShyuCWC99 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCD.1999.808557 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
rdfs:label Generic Universal Switch Blocks. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guang-Ming_Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michael_Shyu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yao-Wen_Chang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yu-Dong_Chang>
swrc:pages 311-314 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccd/1999>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccd/ShyuCWC99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccd/ShyuCWC99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccd/iccd1999.html#ShyuCWC99>
rdfs:seeAlso <https://doi.org/10.1109/ICCD.1999.808557>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccd>
dc:subject FPGA, HFPGA, logic block, switch block, programmable switch, universal switch block, routing, routability, dimension constraint, flexibility (xsd:string)
dc:title Generic Universal Switch Blocks. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document