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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccd/ThomasA99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Brian_W._Anthony>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tom_Thomas>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCD.1999.808551>
foaf:homepage <https://doi.org/10.1109/ICCD.1999.808551>
dc:identifier DBLP conf/iccd/ThomasA99 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCD.1999.808551 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
rdfs:label Area, Performance, and Yield Implications of Redundancy in On-Chip Caches. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Brian_W._Anthony>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tom_Thomas>
swrc:pages 291-292 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccd/1999>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccd/ThomasA99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccd/ThomasA99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccd/iccd1999.html#ThomasA99>
rdfs:seeAlso <https://doi.org/10.1109/ICCD.1999.808551>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccd>
dc:subject microprocessor, microprocessor design, cache, SRAM, embedded SRAM, redundancy, yield, yield enhancement (xsd:string)
dc:title Area, Performance, and Yield Implications of Redundancy in On-Chip Caches. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document