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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccd/YamadaHNMYS95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fumio_Murabayashi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hideo_Sawamoto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiromichi_Yamada>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Nishiyama>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takashi_Hotta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tatsumi_Yamauchi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCD.1995.528909>
foaf:homepage <https://doi.org/10.1109/ICCD.1995.528909>
dc:identifier DBLP conf/iccd/YamadaHNMYS95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCD.1995.528909 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label A 13.3ns double-precision floating-point ALU and multiplier. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fumio_Murabayashi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hideo_Sawamoto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiromichi_Yamada>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Nishiyama>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takashi_Hotta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tatsumi_Yamauchi>
swrc:pages 466-470 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccd/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccd/YamadaHNMYS95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccd/YamadaHNMYS95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccd/iccd1995.html#YamadaHNMYS95>
rdfs:seeAlso <https://doi.org/10.1109/ICCD.1995.528909>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccd>
dc:subject floating point arithmetic; multiplying circuits; CMOS integrated circuits; double-precision floating-point ALU; floating-point multiplier; normalization; arithmetic logic unit; carry select addition; prerounding techniques; noise tolerant precharge circuit; CMOS technology; two-cycle latency; 13.3 ns; 0.3 micron; 2.5 V; 150 MHz (xsd:string)
dc:title A 13.3ns double-precision floating-point ALU and multiplier. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document