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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccd/YokotaMOHHS95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Atsushi_Hori>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hideo_Hirono>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Matsuoka>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kazuaki_Okamoto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shuichi_Sakai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takashi_Yokota>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCD.1995.528822>
foaf:homepage <https://doi.org/10.1109/ICCD.1995.528822>
dc:identifier DBLP conf/iccd/YokotaMOHHS95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCD.1995.528822 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label A prototype router for the massively parallel computer RWC-1. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Atsushi_Hori>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hideo_Hirono>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Matsuoka>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kazuaki_Okamoto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shuichi_Sakai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takashi_Yokota>
swrc:pages 279-284 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccd/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccd/YokotaMOHHS95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccd/YokotaMOHHS95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccd/iccd1995.html#YokotaMOHHS95>
rdfs:seeAlso <https://doi.org/10.1109/ICCD.1995.528822>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccd>
dc:subject parallel architectures; multiprocessor interconnection networks; VLSI; CMOS integrated circuits; prototype router; massively parallel computer RWC-1; multi-threaded architecture; high communication performance; hardware cost; direct interconnection networks; small degree; low latency; high throughput; VLSI chip; operating system support features; CMOS gate array (xsd:string)
dc:title A prototype router for the massively parallel computer RWC-1. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document