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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iccd/ZhengA95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alexander_Albicki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Menghui_Zheng>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCD.1995.528924>
foaf:homepage <https://doi.org/10.1109/ICCD.1995.528924>
dc:identifier DBLP conf/iccd/ZhengA95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCD.1995.528924 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Low power and high speed multiplication design through mixed number representations. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alexander_Albicki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Menghui_Zheng>
swrc:pages 566-576 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iccd/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iccd/ZhengA95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iccd/ZhengA95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iccd/iccd1995.html#ZhengA95>
rdfs:seeAlso <https://doi.org/10.1109/ICCD.1995.528924>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iccd>
dc:subject digital arithmetic; redundant number systems; high speed multiplication; mixed number representations; low power multiplication; VLSI architecture; reduced switching; Sign-Magnitude; Redundant Binary adder; Booth decoder; Carry-Propagation-Free; Partial Products (xsd:string)
dc:title Low power and high speed multiplication design through mixed number representations. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document