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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icce-tw/LinH19>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chien_Yu_Lin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Heng_Shou_Hsu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCE-TW46550.2019.8991833>
foaf:homepage <https://doi.org/10.1109/ICCE-TW46550.2019.8991833>
dc:identifier DBLP conf/icce-tw/LinH19 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCE-TW46550.2019.8991833 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
rdfs:label Design of A 0.8GHz-3GHz Duty-Cycle Corrector With a 20%-80% Input Duty Cycle. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chien_Yu_Lin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Heng_Shou_Hsu>
swrc:pages 1-2 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icce-tw/2019>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icce-tw/LinH19/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icce-tw/LinH19>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icce-tw/icce-tw2019.html#LinH19>
rdfs:seeAlso <https://doi.org/10.1109/ICCE-TW46550.2019.8991833>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icce-tw>
dc:title Design of A 0.8GHz-3GHz Duty-Cycle Corrector With a 20%-80% Input Duty Cycle. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document