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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icct/ChenZR21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Haoqi_Ren>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ming_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhifeng_Zhang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICCT52962.2021.9658046>
foaf:homepage <https://doi.org/10.1109/ICCT52962.2021.9658046>
dc:identifier DBLP conf/icct/ChenZR21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICCT52962.2021.9658046 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label Design and Verification of High Performance Memory Interface Based on AXI Bus. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Haoqi_Ren>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ming_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhifeng_Zhang>
swrc:pages 695-699 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icct/2021>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icct/ChenZR21/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icct/ChenZR21>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icct/icct2021.html#ChenZR21>
rdfs:seeAlso <https://doi.org/10.1109/ICCT52962.2021.9658046>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icct>
dc:title Design and Verification of High Performance Memory Interface Based on AXI Bus. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document