Process Variability-Aware Statistical Hybrid Modeling of Dynamic Power Dissipation in 65 nm CMOS Designs.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/iccta/HarishBP07
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2007
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Process Variability-Aware Statistical Hybrid Modeling of Dynamic Power Dissipation in 65 nm CMOS Designs.
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mixed-mode simulations, Response Surface Methodology, Least Squares Method, hybrid model.
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Process Variability-Aware Statistical Hybrid Modeling of Dynamic Power Dissipation in 65 nm CMOS Designs.
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