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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icecsys/BathaeeMGA02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anahita_Afkham>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hamid_Ghezelayagh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mehdi_Bathaee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zed_Mostoufi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICECS.2002.1046306>
foaf:homepage <https://doi.org/10.1109/ICECS.2002.1046306>
dc:identifier DBLP conf/icecsys/BathaeeMGA02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICECS.2002.1046306 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label A 2.0 GHz 4 Mb pseudo-SRAM with on-chip BIST for refresh in 0.18u CMOS technology with LVDS output data bus drivers. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anahita_Afkham>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hamid_Ghezelayagh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mehdi_Bathaee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zed_Mostoufi>
swrc:pages 839-841 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icecsys/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icecsys/BathaeeMGA02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icecsys/BathaeeMGA02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icecsys/icecsys2002.html#BathaeeMGA02>
rdfs:seeAlso <https://doi.org/10.1109/ICECS.2002.1046306>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icecsys>
dc:title A 2.0 GHz 4 Mb pseudo-SRAM with on-chip BIST for refresh in 0.18u CMOS technology with LVDS output data bus drivers. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document