An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS Prescalers.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/icecsys/DesikachariSHM07
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/icecsys/DesikachariSHM07
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jeffrey_M._Huard
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mark_Steeds
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ranganathan_Desikachari
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Un-Ku_Moon
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FICECS.2007.4511074
>
foaf:
homepage
<
https://doi.org/10.1109/ICECS.2007.4511074
>
dc:
identifier
DBLP conf/icecsys/DesikachariSHM07
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FICECS.2007.4511074
(xsd:string)
dcterms:
issued
2007
(xsd:gYear)
rdfs:
label
An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS Prescalers.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jeffrey_M._Huard
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mark_Steeds
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ranganathan_Desikachari
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Un-Ku_Moon
>
swrc:
pages
645-648
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/icecsys/2007
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/icecsys/DesikachariSHM07/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/icecsys/DesikachariSHM07
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/icecsys/icecsys2007.html#DesikachariSHM07
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ICECS.2007.4511074
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/icecsys
>
dc:
title
An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS Prescalers.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document