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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icecsys/MansourMHS00>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ibrahim_N._Hajj>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Makram_M._Mansour>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohammad_M._Mansour>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naresh_R._Shanbhag>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICECS.2000.911614>
foaf:homepage <https://doi.org/10.1109/ICECS.2000.911614>
dc:identifier DBLP conf/icecsys/MansourMHS00 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICECS.2000.911614 (xsd:string)
dcterms:issued 2000 (xsd:gYear)
rdfs:label Instruction scheduling for low power on dynamically variable voltage processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ibrahim_N._Hajj>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Makram_M._Mansour>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohammad_M._Mansour>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naresh_R._Shanbhag>
swrc:pages 613-618 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icecsys/2000>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icecsys/MansourMHS00/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icecsys/MansourMHS00>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icecsys/icecsys2000.html#MansourMHS00>
rdfs:seeAlso <https://doi.org/10.1109/ICECS.2000.911614>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icecsys>
dc:title Instruction scheduling for low power on dynamically variable voltage processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document