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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icecsys/PerriCCCS01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Giovanni_Staino>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Giuseppe_Cocorullo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gregorio_Cappuccino>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pasquale_Corsonello>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stefania_Perri>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICECS.2001.957577>
foaf:homepage <https://doi.org/10.1109/ICECS.2001.957577>
dc:identifier DBLP conf/icecsys/PerriCCCS01 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICECS.2001.957577 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
rdfs:label VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Giovanni_Staino>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Giuseppe_Cocorullo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gregorio_Cappuccino>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pasquale_Corsonello>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stefania_Perri>
swrc:pages 723-727 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icecsys/2001>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icecsys/PerriCCCS01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icecsys/PerriCCCS01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icecsys/icecsys2001.html#PerriCCCS01>
rdfs:seeAlso <https://doi.org/10.1109/ICECS.2001.957577>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icecsys>
dc:title VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document