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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iceee/AlvarezAAT17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alfonso_Torres-J%E2%88%9A%C2%B0come>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Carlos_Ram%E2%88%9A%E2%89%A5n_B%E2%88%9A%C2%B0ez_%E2%88%9A%C4%80lvarez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/M%E2%88%9A%E2%89%A5nico_Linares_Aranda>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wilfrido_Calleja_Arriaga>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICEEE.2017.8108843>
foaf:homepage <https://doi.org/10.1109/ICEEE.2017.8108843>
dc:identifier DBLP conf/iceee/AlvarezAAT17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICEEE.2017.8108843 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label Anisotropic silicon etch to house CMOS compatible MEMS microstructures without planarization techniques. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alfonso_Torres-J%E2%88%9A%C2%B0come>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Carlos_Ram%E2%88%9A%E2%89%A5n_B%E2%88%9A%C2%B0ez_%E2%88%9A%C4%80lvarez>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M%E2%88%9A%E2%89%A5nico_Linares_Aranda>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wilfrido_Calleja_Arriaga>
swrc:pages 1-4 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/ICEEE.2017.8108843>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iceee>
dc:title Anisotropic silicon etch to house CMOS compatible MEMS microstructures without planarization techniques. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document