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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ices/IshidaNTMKFH08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eiichi_Takahashi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hirotaka_Nosato>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Isamu_Kajitani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masahiro_Murakawa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tatsumi_Furuya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Higuchi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yukari_Ishida>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-85857-7%5F21>
foaf:homepage <https://doi.org/10.1007/978-3-540-85857-7_21>
dc:identifier DBLP conf/ices/IshidaNTMKFH08 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-85857-7%5F21 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Proposal for LDPC Code Design System Using Multi-Objective Optimization and FPGA-Based Emulation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eiichi_Takahashi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hirotaka_Nosato>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Isamu_Kajitani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masahiro_Murakawa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tatsumi_Furuya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Higuchi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yukari_Ishida>
swrc:pages 237-248 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ices/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ices/IshidaNTMKFH08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ices/IshidaNTMKFH08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ices/ices2008.html#IshidaNTMKFH08>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-85857-7_21>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ices>
dc:subject error-correcting code; LDPC; multi-objective optimization; MOGA; communication channel model; ISI; FPGA emulation; parallelization; MPI; PC cluster (xsd:string)
dc:title Proposal for LDPC Code Design System Using Multi-Objective Optimization and FPGA-Based Emulation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document