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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ices/IwataKLKH01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Isamu_Kajitani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masaya_Iwata>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nobuki_Kajihara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Higuchi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yong_Liu_0012>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F3-540-45443-8%5F4>
foaf:homepage <https://doi.org/10.1007/3-540-45443-8_4>
dc:identifier DBLP conf/ices/IwataKLKH01 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F3-540-45443-8%5F4 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
rdfs:label Implementation of a Gate-Level Evolvable Hardware Chip. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Isamu_Kajitani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masaya_Iwata>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nobuki_Kajihara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Higuchi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yong_Liu_0012>
swrc:pages 38-49 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ices/2001>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ices/IwataKLKH01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ices/IwataKLKH01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ices/ices2001.html#IwataKLKH01>
rdfs:seeAlso <https://doi.org/10.1007/3-540-45443-8_4>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ices>
dc:title Implementation of a Gate-Level Evolvable Hardware Chip. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document