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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ices/KajitaniHNYNYIKIKH98>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Daisuke_Nishikawa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Didier_Keymeulen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Yokoi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Isamu_Kajitani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masaya_Iwata>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nobuki_Kajihara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shogo_Nakaya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takeshi_Inuo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Higuchi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tsukasa_Yamauchi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tsutomu_Hoshino>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2FBFb0057602>
foaf:homepage <https://doi.org/10.1007/BFb0057602>
dc:identifier DBLP conf/ices/KajitaniHNYNYIKIKH98 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2FBFb0057602 (xsd:string)
dcterms:issued 1998 (xsd:gYear)
rdfs:label A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Daisuke_Nishikawa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Didier_Keymeulen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Yokoi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Isamu_Kajitani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masaya_Iwata>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nobuki_Kajihara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shogo_Nakaya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takeshi_Inuo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Higuchi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tsukasa_Yamauchi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tsutomu_Hoshino>
swrc:pages 1-12 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ices/1998>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ices/KajitaniHNYNYIKIKH98/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ices/KajitaniHNYNYIKIKH98>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ices/ices1998.html#KajitaniHNYNYIKIKH98>
rdfs:seeAlso <https://doi.org/10.1007/BFb0057602>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ices>
dc:title A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document