Time Aware Modelling and Analysis of Multiclocked VLSI Systems. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/icfem/WesterlundP06>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Juha_Plosila>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Tomi_Westerlund>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1007%2F11901433%5F40>
foaf:homepage	<https://doi.org/10.1007/11901433_40>
dc:identifier	DBLP conf/icfem/WesterlundP06 (xsd:string)
dc:identifier	DOI doi.org%2F10.1007%2F11901433%5F40 (xsd:string)
dcterms:issued	2006 (xsd:gYear)
rdfs:label	Time Aware Modelling and Analysis of Multiclocked VLSI Systems. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Juha_Plosila>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Tomi_Westerlund>
swrc:pages	737-756 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/icfem/2006>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/icfem/WesterlundP06/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/icfem/WesterlundP06>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/icfem/icfem2006.html#WesterlundP06>
rdfs:seeAlso	<https://doi.org/10.1007/11901433_40>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/icfem>
dc:subject	Timed Action Systems, GALS, formal methods, time. (xsd:string)
dc:title	Time Aware Modelling and Analysis of Multiclocked VLSI Systems. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:InProceedings
rdf:type	foaf:Document