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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icip/ChangLJW17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dongsheng_Wang_0002>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Liangliang_Chang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiangyang_Ji>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhenyu_Liu_0001>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICIP.2017.8296833>
foaf:homepage <https://doi.org/10.1109/ICIP.2017.8296833>
dc:identifier DBLP conf/icip/ChangLJW17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICIP.2017.8296833 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label Coding sensitive based approximation algorithm for power efficient VBS-DCT VLSI design in HEVC hardwired Intra encoder. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dongsheng_Wang_0002>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Liangliang_Chang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiangyang_Ji>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhenyu_Liu_0001>
swrc:pages 3001-3005 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icip/2017>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icip/ChangLJW17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icip/ChangLJW17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icip/icip2017.html#ChangLJW17>
rdfs:seeAlso <https://doi.org/10.1109/ICIP.2017.8296833>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icip>
dc:title Coding sensitive based approximation algorithm for power efficient VBS-DCT VLSI design in HEVC hardwired Intra encoder. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document