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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icip/ChoHHW05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chuan-Yu_Cho>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jeng-Neng_Hwang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jia-Shung_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shiang-Yang_Huang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICIP.2005.1530567>
foaf:homepage <https://doi.org/10.1109/ICIP.2005.1530567>
dc:identifier DBLP conf/icip/ChoHHW05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICIP.2005.1530567 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label An embedded merging scheme for VLSI implementation of H.264/AVC motion estimation modules. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chuan-Yu_Cho>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jeng-Neng_Hwang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jia-Shung_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shiang-Yang_Huang>
swrc:pages 1016-1019 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icip/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icip/ChoHHW05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icip/ChoHHW05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icip/icip2005-3.html#ChoHHW05>
rdfs:seeAlso <https://doi.org/10.1109/ICIP.2005.1530567>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icip>
dc:title An embedded merging scheme for VLSI implementation of H.264/AVC motion estimation modules. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document